1. Field of Invention
The present invention relates to signal multiplexors, in a particular, to digital signal multiplexors.
2. Related Art Paragraph
Signal multiplexors are well known in the art, and are generally used to perform signal switching or routing functions. Generally, when multiplexing analog signals, relative timing between the input switching and a particular point on the waveform of the analog signal being selected is of little concern or consequence. However, when multiplexing digital signals, such timing can be critical. For example, if the signals being multiplexed are periodic, i.e., with periodic asserted and de-asserted states, such relative timing can result in the output signal having a signal state (asserted or de-asserted) which is truncated prematurely. For example, when switching between two clock signals, if it is desirable to maintain output clock signal pulses having consistent or constant pulse durations, relative timing of the switching can be critical and difficult to maintain correctly. Such premature or otherwise undesirable truncation of output signal pulses are often referred to as “glitches”, and are generally undesirable, and often problematic.